Re: [sc-users] Re: Oscillator phase reset possible?

[Andrea Valle <valle@xxxxxxxxxxx>]

I was meaning something like this:

s.boot ;

SynthDef("sineme", { arg freq=100, phase=0, mul=0.5; 

Out.ar(0, SinOsc.ar(freq,phase, mul))}).send(s) ;

~synth = Synth(\sineme) ;

r = Routine({

inf.do{

~synth.set(\phase, 2pi.rand.postln) ;

1.wait ;

}

}) ;

SystemClock.play(r)

s.scope

Best

-a-

On 7 May 2009, at 15:52, Carlo Capocasa wrote:

Sure.

trig = SomeTrig.ar;

out = SinOsc(440,trig);

Behavior: On 'trig' SinOsc's phase resets to 0.

Thanks for replying!

Carlo

Andrea Valle wrote:

Well, while scheduling you just set the phase arg.

I would say you should post some code. It's easier to be helpful

Best

-a-

On 5 May 2009, at 23:26, Carlo Capocasa wrote:

Hello everyone!

I never cease to be amazed how many industrious helpful people this

community has. Thank you!

Is it possible to trigger a reset of the phase of an oscillator? IE

reset it to the state it was in at the time it was instantiated.

Carlo

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" This is a very complicated case, Maude. You know, a lotta ins, a lotta outs, a lotta what-have-yous." 

(Jeffrey 'The Dude' Lebowski)