[sc-dev] SCe feasibility

[Christopher Frauenberger <frauenberger@xxxxxx>]

Thanks everybody for your thoughts on this, SC embedded seemed to  
have sparked at least some interesting conversation.

Despite all the issues mentioned in earlier emails, I am not willing  
to give up that easily. Hence, here some thoughts and questions  
regarding the feasibility of such a port:

* Fixed point conversion: there are some papers out there on the  
automatic creation of DSP code converting floating point to fixed  
point (e.g. http://r2d2.enssat.fr/bindocs/publications/ 
Menard02_CASES.pdf). Does anyone have experience with that? Defining  
one precision for signals, one for timing and so forth might lead to  
relatively simple conversion rules...

* The port of SC server itself (osc, nodes, timing etc) seems  
manageable, what requires more effort is to get the algorithms in the  
UGens done. Given the limited computational power of many target  
devices, maybe a subset of UGens would be sufficient, so: What kind  
of stuff would people think is the most important? Oscillators,  
Filters (no Klank ;-) - One might be able to do quite a lot with all  
sinus oscillators and a few filters...

* At computational power: most iPods for example use a dual 90MHz ARM  
32bit processor. Any thoughts on how much one might be able to run on  
such machines? Not sure how well threads can be distributed on two  
cores, this might be another issue...


Chris